IP DV Engineer
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Job ID: 150639177
Skills:
Verilog, random stimulus, assertion-based verification, Uvm, bus functional models, functional coverage, scoreboards, checkers, advanced verification methodologies, VMM, systemverilog, monitors
Skills:
rtl verification , Debugging, Design Verification, IP Verification, IP DV, systemverilog, Uvm, Testbench Development, Functional Verification, AMBA, Axi, AHB, APB
