Job Description:
Work as part of Mixed Signal and IO Library Development team in Central Engineering. Primary responsibilities include:
- Design and verification of IO interfaces and mixed signal blocks such as POR, process monitors, voltage/temperature sensors, crystal oscillators etc.
- RTL coding, synthesis and verification of digital wrappers that interface with analog circuitry
- Interface with both custom and P&R layout engineers and oversee physical design and verification.
- Develop functional models and perform timing characterization of these cells.
- Directly interface with end customers to understand their requirements, come up with specifications and implement circuit designs that support them.
- Create necessary infrastructure and generate test vectors to support silicon validation of these blocks on test chips.
- Work with test engineers to support silicon validation either on ATE or on the bench.
- Develop accurate documentation in the form of datasheets, application notes and integration guides
Skills and Qualifications Required:
- Educational requirements: MSEE with a minimum of 5-10 years of hands-on experience in independently designing mixed signal circuits especially in newer CMOS technologies such as 5nm or 3nm
- Must have experience in designing analog circuits such as PLLs, LDOs, Bandgap references, ADCs or DACs--knowledge of AMS methodology and analog circuit modeling will be a plus
- Must be proficient with Cadence Virtuoso Schematic Capture and ADE along with an excellent knowledge of spice based simulators such as Spectre and/or Hspice
- Working knowledge of LVS, DRC along with EM/ESD verification tools such as Totem/Pathfinder/PER
- Strong written and oral communication skills in English to be able to work effectively across geographies as well as to be able to interface with end customers
- Require proficiency in automation using shell scripting or any other languages such as SED, AWK, TCL or PERLˇ
R025725
