Overview of the Role
We are looking for candidate with minimum 5+ years of relevant experience in FPGA Haps .The FPGA Prototyping Engineer will play a pivotal role in accelerating ASIC/SoC development by leveraging Synopsys HAPS platforms. This position focuses on the logical partitioning, mapping, and validation of complex RTL designs across multiple FPGAs, ensuring seamless prototyping and functional verification. The role is crucial in reducing time-to-market, enhancing product reliability, and contributing to HCLTech's reputation for engineering excellence
.
Detailed Responsibiliti
- es
Design and implement logical partitioning strategies for large-scale ASIC/SoC RTL designs to optimize FPGA prototypi - ng.Perform hands-on mapping of RTL across multiple Synopsys HAPS FPGA systems, ensuring efficient resource utilization and performan
- ce.Validate and debug comprehensive SoC functionality on FPGA platforms, identifying and resolving integration issu
- es.Collaborate with cross-functional teams, including design, verification, and firmware engineers, to support end-to-end prototyping and testi
- ng.Document and maintain prototyping flows, methodologies, and best practices for knowledge sharing and process improveme
- nt.Provide technical guidance and troubleshooting support during prototyping phases and customer engagemen
ts.
Skill Requirem
- entsBachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related technical fi
- eld.Demonstrated experience with Synopsys HAPS (High Performance ASIC Prototyping Syst
- em).Strong proficiency in logical partitioning and mapping large ASIC/SoC RTL designs across multiple FP
- GAs.In-depth knowledge of FPGA design, synthesis, and debugging to
- ols.Proven ability to validate and debug SoC functionality on FPGA platfo
- rms.Excellent problem-solving, analytical, and communication ski
lls.
