FPGA Design Engineer
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Job Description
FPGA Design Engineer Job Description
Experience Require-5-12 Y
Location-Bangalore/Hyderabad
Responsibilities:
* Design and implement FPGA solutions.
* Participate in architecture definition, implementation, and verification phases.
* Develop detailed design specifications.
* Develop and implement block-level RTL, perform synthesis, and achieve timing closure.
* Collaborate with multi-functional teams including hardware, software, diagnostics, and signal integrity groups.
* Assist in complex subsystem-level lab bring-up, integration, and unit test validation.
Required Skills and Experience
:* Experience with Xilinx, Altera, and Microsemi FPGAs
.* Proficiency in HDL languages: Verilog, VHDL, and SystemVerilog
.* Hands-on experience with FPGA vendor tools such as Vivado, Quartus, and Libero
.* Practical knowledge of Ethernet-based protocols, PCIe, AXI, memory controllers, OTN, I2C, SPI, UART, etc
.* Familiarity with simulation flows like UVM and VMM is an added advantage
.* Basic knowledge of Unix systems and scripting tools
.* 5-12 years of relevant FPGA design experience
.
Job ID: 153645939
Skills:
Vcs, DDR, Pcie, Debugging, Python, Usb, FPGA Design, Ethernet, Tcl, FPGA toolchains, logic analyzers, Oscilloscopes, clock domain crossing, Intel Quartus, Resource Optimization, VHDL, in-circuit emulators, Lattice Diamond, Timing Analysis, systemverilog, Xilinx Vivado, Questa, Modelsim, digital system design, Hardware Verification
Skills:
FPGA Design, Verilog, FPGA debugging, VHDL, AMD Vivado, logic analyzers, Intel Altera Quartus, Oscilloscopes, Libero SoC
Skills:
Hdl, VHDL
Skills:
Vcs, Pcie, Verilog, Debugging, Python, Scripting, Bash, Digital Logic Design, FPGA Design, Ethernet, Tcl, high-speed interfaces, Xcelium, Simulation Tools, FPGA synthesis, LPDDR4, Altera Quartus Prime Pro, LPDDR5, systemverilog, Axi, Timing Closure, Questa, CXL, DDR5, DDR4
Skills:
VHDL programming, Xilinx, FPGA development, hardware debugging, Intel Altera, Timing Closure, RFSoC, Vivado, Modelsim, LabVIEW FPGA, Rtl Design, Simulation
