FPGA Design Engineer
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Hi Folks,
Greetings from ACL Digital !
Experience: 2 Years
Location: Hyderabad
We are hiring a Post-Silicon Validation Engineer experience in FPGA-based SoC validation, specializing in Intel PSG's Falcon Mesa (FM85) platform.
Strong expertise in firmware validation, debugging, and automation using Python/TCL is required.
Hands-on experience validating PCIe, JTAG, QSPI, AVST, and DDR protocols is essential.
About Company:
ACL Digital, a leader in digital engineering and transformation, is part of the ALTEN Group. At ACL Digital, we empower organizations to thrive in an AI-first world. Our expertise spans the entire technology stack, seamlessly integrating AI and data-driven solutions from Chip to cloud. By choosing ACL Digital, you gain a strategic advantage in navigating the complexities of digital transformation. Let us be your trusted partner in shaping the future.
Job ID: 144789189
Skills:
Tcl Scripting, Vivado Quartus or Libero Tools, RTL Design using Verilog VHDL, Hardware Debugging and Board Bring-up, FPGA Design Flow Synthesis Implementation P R Timing Closure, High-Speed Protocols PCIe Ethernet DDR Transceivers, FPGA Design and Validation, CDC Clock Domain Crossing Analysis, Simulation using Questasim, FPGA Integration Experience, Experience using Oscilloscopes and Logic Analyzers, Static Timing Analysis STA
Skills:
microblaze , synplify , nios ii , Vcs, Shell, Verilog, Tcl, Ethernet, Python, Pcie, DDR, quartus, Questa, systemverilog, Lattice FPGAs, Vivado, Modelsim, VHDL, Xilinx, Intel Altera, ARM SoCs, Axi
Skills:
Fpga, Tcl Scripting, FPGA hardware platforms
