L&T Technology Services is hiring for Formal Verification Engineers with 5+ years of experience.
Job Location: Bangalore, India.
Job Description is mentioned in details::
As a formal verification engineer working the complete formal verification for single or multiple design blocks and IP's (CPU, Connectivity IP, Audio and Image Processing IP, Neural Networks IP, Memory/DMA Controller, Security IP, Peripheral IP, Interconnects, Power management subsystems, etc.), you will be responsible for: -
- Working with Silicon's world-class design engineers to develop a formal micro-architecture specification
- Developing comprehensive formal verification test plan that includes unique verification requirement
- Proving properties of the design, finding design bugs, and working closely with design teams to help improve the micro-architecture.
- Crafting novel and creative solutions for modelling and proving robustness of complex design micro-architectures
- Developing and implementing re-usable and optimized formal models and verification code base
- Architecting correct-by-construction design methodologies for improved formal verification efficiency and productivity.
- Understanding of temporal logic assertions
- Experience with at least one formal verification tool (e.g., Cadence Jasper, Synopsys VC-Formal).
- Experience with complex verification projects that used formal techniques for closure
- Skills in Python, Perl, or Shell scripting (a plus).
