Field-Programmable Gate Arrays Engineer

About the Company

We HCL TECH are looking for professional who have experience in.

About the Role

Experience working with Synopsys HAPS (High‑Performance ASIC Prototyping System).

Responsibilities

• Proficient in logical partitioning of large designs for FPGA prototyping
• 6+ years of relevant Hands-on experience mapping large ASIC/SoC RTL designs across multiple FPGAs
• Ability to validate and debug the complete SoC functionality on FPGA platforms

Location

Bengaluru/Chennai