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Ethernet Verification Engineer

Ethernet Verification Engineer

leadsoc technologies pvt ltd
5-7 Years
Not Disclosed
  • Posted 11 hours ago
  • Be among the first 10 applicants

Job Description

Job Description – Ethernet Protocol Compliance / CTS Engineer

Design Verification Engineer – Ethernet

Experience: 5+ Years

Domain: Ethernet / SoC / IP Verification

Job Description:

  • Strong hands-on experience in Design Verification of Ethernet IP/SoC.
  • Minimum 2+ years of experience in Ethernet Protocol Compliance / CTS execution and coverage closure.
  • Experience in executing and analyzing Ethernet Compliance Test Suites (CTS) and driving coverage closure.
  • Strong expertise in failure analysis, protocol-level debugging, root-cause analysis, and issue closure.
  • Analyze logs, waveforms, protocol traces, and test results to identify and resolve failures.
  • Good understanding of Ethernet packet structure, protocol behavior, and compliance requirements.
  • Work closely with RTL Design, Verification, Validation, and Firmware teams for debug and issue resolution.
  • Develop/debug test cases and support regression, coverage analysis, and compliance closure.
  • Experience with SystemVerilog/UVM and verification methodologies is preferred.

Good to Have:

  • Experience with 10G/25G/40G/100G/200G/400G Ethernet.
  • Knowledge of IEEE 802.3, Ethernet MAC/PCS/PHY.
  • Experience with protocol analyzers, traffic generators, and Ethernet validation tools.
  • Scripting/programming knowledge in Python, C/C++ or Shell.
  • ASIC/SoC/IP verification experience.

Key Requirement:

Candidates must have hands-on Ethernet Protocol Compliance / CTS Coverage Closure experience, not just generic Ethernet testing or validation exposure.

Immediate joiners are strongly preferred.

More Info

Key Skills

protocol-level debugging

Ethernet Compliance Test Suites CTS

verification methodologies

protocol analyzers

traffic generators

SystemVerilog UVM

Ethernet validation tools

Ethernet Protocol Compliance CTS execution

protocol behavior

Design Verification of Ethernet IP SoC

Ethernet packet structure

ASIC SoC IP verification

root-cause analysis

compliance requirements

400G Ethernet

Shell