DFT Technical Architect_Visakhapatnam
eximietas design- Posted 29 days ago
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Job Description
Hi All,
Greetings from Eximietas Design...!
We're Hiring | Senior DFT Architect | Eximietas Design
Locations:
- India: Bengaluru, Hyderabad, Ahmedabad & Visakhapatnam.
San Jose (Bay Area), USA.
- Eligibility (USA): U.S. Permanent Residents (Green Card holders).
Experience:18+ Years.
Job Description:
We are seeking motivated Design for Test (DFT) professionals to join our growing team. You will be responsible for the end-to-end DFT flow, from RTL to final pattern delivery, across complex IP, Subsystem, and SoC designs.
Key Skills:
End-to-End DFT Flow Ownership.
Scan Insertion, EDT & OCC.
ATPG, DRC Analysis & Coverage Closure.
Pattern Simulation & Debugging.
SoC Integration & Pattern Retargeting.
MBIST, IJTAG & JTAG Implementation.
DFT Sign-off Activities.
Tools Expertise:
Siemens Tessent.
Synopsys TestMAX / TetraMAX.
Cadence Modus.
Preferred Skills:
Streaming Scan Network (SSN).
Analog & Mixed-Signal DFT.
SpyGlass DFT.
RTL DFT Methodologies.
TCL, Python & Perl Scripting.
Core Responsibilities:
• End-to-end ownership of DFT implementation flow from RTL to sign-off.
• Scan architecture implementation including EDT & OCC.
• ATPG, DRC analysis, coverage optimization, and pattern simulations.
• SoC integration, pattern retargeting, and DFT debugging.
• MBIST, IJTAG, and Boundary Scan (JTAG) integration.
• Collaboration with Design, Verification, and Physical Design teams.
• DFT sign-off ownership and deliverables.
Technical Requirements:
• Strong experience in ATPG simulations and netlist handling.
• Expertise in block-level and SoC-level pattern retargeting/debugging.
• Strong understanding of ICL and PDL standards.
• Hands-on experience with Tessent, TestMAX/TetraMAX, or Modus.
Interested candidates can share their updated resume at:
[Confidential Information]
Contact: +91 8088969910
Referrals are highly appreciated. Please share within your network.
Best Regards,
Maruthy Prasaad
Associate VLSI Manager – Talent Acquisition | Visakhapatnam
Eximietas Design (Excellence by Design)
Inspired by nature, driven by silicon.
More Info
Key Skills
MBIST IJTAG JTAG Implementation
SpyGlass DFT
ICL and PDL standards
SoC Integration Pattern Retargeting
Synopsys TestMAX TetraMAX
Siemens Tessent
Pattern Simulation Debugging
ATPG simulations
End-to-End DFT Flow Ownership
Cadence Modus
Scan Insertion EDT OCC
Analog Mixed-Signal DFT
RTL DFT Methodologies
ATPG DRC Analysis Coverage Closure
Streaming Scan Network SSN
TCL Python Perl Scripting
Netlist handling
DFT Sign-off Activities
About Company
