DFT Senior Engineer
DFT Senior Engineer
Quest Global- Posted 3 hours ago
- Be among the first 10 applicants
Job Description
Job Requirements
- Hardware Design Knowledge: Strong understanding of digital circuits, ASIC/FPGA design, and IC layouts is essential
- Programming and Scripting: Proficiency in Verilog, VHDL, C/C++, and scripting languages for test automation
- DFT Techniques: Expertise in scan testing, BIST, ATPG (Automatic Test Pattern Generation), and test data compression
- Analytical and Communication Skills: Ability to analyze complex designs, troubleshoot issues, and communicate effectively with cross-functional teams
- Adaptability: Keeping up with emerging trends like low-power designs and advanced test methodologies is important for career growth
More Info
Key Skills
IC layouts
scripting languages for test automation
test data compression
scan testing
About Company
Skills:
boundary scan , logic bist , DFT techniques, Memory BIST, IDDQ, Bridging fault generation, Pin-muxing, At-speed Path delay, SDD, At-speed Scan Test-clocking, Scan On-Chip Compression, Test vector Stuck-at, Analog Testing, on-chip compression, high test coverage, timing SDF, Scan Insertion, Test Modes implementation and verification, simulations at gate level
Skills:
Soc Architecture, Tcl, Python, Perl, HDLs, MBIST, ATPG flow implementation, UPF, Cadence digital implementation tools, DFT architecture definition, Tempus, CPF, Scan, Genus, tessent DFT, JTAG boundary scan