DFT Engineers
- Posted 28 days ago
- Over 50 applicants have applied
Job Description
- Strong fundamental knowledge of DFT techniques including JTAG, ATPG, yield learning, logic diagnosis, Scan compression, IJTAG. and MBIST/LBIST.
- Experience in Tessent based ATPG flow, GLS and Post-silicon-debug.
- Hands-on in Perl/Tcl/Python scripting.
- Excellent analytical, and problem-solving skills.
- Perform Core and SOC level ATPG to meet Automotive grade quality.
- Hierarchical ATPG retargeting and Pattern release for application on ATE.
- Perform SOC and Core level Timing/Non-timing GLS.
- Silicon bring-up, diagnosis and support for physical failure analysis.
- Enable Emulation of Gate level SCAN patterns.
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