DFT Engineer
DFT Engineer
Wenger & Watson Inc.This job is no longer accepting applications
Job Description
Hiring: DFT Architect / Principal DFT Engineer
Locations: Bangalore
Experience: 7+ years
We are looking for experienced DFT Architects / Principal DFT Engineers to drive DFT architecture, methodology, and implementation for next-generation high-performance SoCs and IPs.
Key Responsibilities
- Define end-to-end DFT architecture and test strategy for complex SoCs
- Lead Scan/ATPG, MBIST, LBIST, JTAG, IJTAG and IEEE 1500 implementations
- Drive hierarchical DFT integration, test-mode clocking and power-aware test methodologies
- Optimize test time, test data volume and manufacturing cost
- Collaborate with RTL, Architecture, Physical Design and Product/Test Engineering teams
- Lead DFT verification, post-silicon bring-up, ATE validation and failure analysis
- Evaluate and establish DFT flows using leading EDA tools
Must-Have Skills
- 10–15+ years of hands-on DFT design, architecture and verification
- Strong expertise in ATPG and advanced fault models
- Experience with MBIST/BISR and LBIST
- Expertise in hierarchical DFT and core-wrapper methodologies
- Proficiency with Synopsys TestMax/TetraMAX, Siemens Tessent or Cadence Modus
- Strong understanding of STA and DFT timing closure
- Strong scripting skills in Tcl / Perl / Python / Shell
More Info
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Key Skills
About Company
Skills:
automation, Scripting, scan compression, BSCAN, MBIST, Siemens Tessent, SSN TestKompress, DFT architecture, ATPG, EDA Tools, Synopsys TetraMAX, DFTMAX, LBIST, IJTAG
Skills:
Scan Insertion, ATE patterns, Test Static Timing Analysis, JTAG protocols, ATPG, Post-silicon validation and debug, BScan, P1687, Gate level simulation debugging
Skills:
boundary scan , bist , Jtag, Debugging, physical design constraints, Sta, verification flows, ATE test pattern generation, compression techniques, MBIST, Analytical Skills, TetraMax, Synopsys DFT Compiler, DFT tools, Tessent, silicon bring-up, Scan ATPG, LBIST, RTL design synthesis
Skills:
MBIST, ATPG, Dft, Scan Insertion, Siemens Tessent, DFT Simulation
Skills:
boundary scan , bist , Jtag, Mentor Tessent, Synopsys TestMAX, EDA Tools, ATPG, Logic Memory, test compression, DFT methodologies, Scan Insertion