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DFT Engineer | Noida | 5+

DFT Engineer | Noida | 5+

erbity
Early Applicant
  • Posted 28 days ago
  • Be among the first 10 applicants

Job Description

Location: Noida

Qualification: BE/BTech/ME/MTech

Key Skills & Experience

  • Hands-on experience in Scan Insertion and ATPG for Stuck-at and At-Speed faults
  • Strong experience in scan coverage analysis and improvement
  • Hands-on experience in MBIST insertion and simulation
  • Experience with Boundary Scan, TAP Controller, and IEEE 1500/P1500
  • Experience with RTL and netlist-based DFT flows
  • Experience in DFT simulation with and without SDF
  • Working knowledge of Synthesis and Formal Verification tools
  • Experience in DC characterization
  • Experience generating TDL for ATE and supporting silicon/ATE bring-up
  • Exposure to DFT tools from Synopsys, Cadence, and Siemens EDA/Mentor
  • Good scripting skills in Perl and TCL
  • Exposure to Static Timing Analysis (STA) is preferred

Requirements

Work

  • Drive DFT insertion, ATPG generation, coverage closure, and pattern validation
  • Debug DFT, scan, ATPG, and simulation issues across RTL and gate-level flows
  • Work closely with Design, Verification, PD, STA, and ATE teams
  • Support DFT activities through tapeout and silicon bring-up

Ideal Profile: Strong hands-on DFT engineer with end-to-end exposure from scan insertion and ATPG through coverage closure and ATE bring-up.

More Info

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Key Skills

RTL and netlist-based DFT flows

Boundary Scan TAP Controller

IEEE 1500 P1500

DC characterization

Synthesis and Formal Verification tools

ATPG for Stuck-at and At-Speed faults

DFT simulation with and without SDF

Scan coverage analysis and improvement

MBIST insertion and simulation

About Company

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Delhi, India
Skills:
PerlStatic Timing AnalysisTclSiemens EDA MentorRTL and netlist-based DFT flowsBoundary Scan TAP ControllerDFT simulationCadenceIEEE 1500 P1500Scan coverage analysisDC characterizationFormal Verification toolsScan InsertionATPGMBIST insertionDFT tools from Synopsys