DFT Engineer
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Job ID: 151380593
Skills:
Full Scan Compression, JTAG Boundary Scan, ATPG pattern generation, Scan chains, Fault Simulation
Skills:
C, Makefile, Windows, Shell, Linux, Perl, Verilog, Ruby, System Verilog, Systemc, IP level ASIC verification, graphics pipeline knowledge, HLS tools, UVM testbenches, automating workflows in a distributed compute environment, developing UVM based verification frameworks, simulation profile efficiency improvement, TLM, debugging firmware and RTL code using simulation tools
Skills:
logic bist , Makefile, Windows, Perl, Linux, Verilog, Ruby, System Verilog, DFT verification, Memory BIST, UVM testbenches, Scan ATPG
Skills:
boundary scan , Verilog, Python, Cadence Tools, ATPG, MBIST, Synopsys
Skills:
C, Makefile, Windows, Shell, Linux, Perl, Verilog, Ruby, System Verilog, Systemc, IP level ASIC verification, graphics pipeline knowledge, HLS tools, UVM testbenches, automating workflows in a distributed compute environment, simulation profile efficiency improvement, debugging firmware and RTL code using simulation tools, UVM based verification frameworks, TLM
