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DFT-DV Verification Lead

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  • Posted 9 days ago
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Job Description



WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.Together, we advance your career.




DFT-DV VERIFICATION LEAD

THE ROLE:

The focus of this role is to plan, build, and execute the verification of new and existing features for AMD's graphics processor IP, resulting in no bugs in the final design.

THE PERSON:

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

PREFERRED EXPERIENCE:

  • Strong Familiarity with Verification Methodologies such as OVM, UVM, or VMM
  • Familiarity with Verilog and General Logic Design concepts
  • Verify DFT architectures including Scan, ATPG, MBIST/LBIST, JTAG/Boundary Scan, and DFx features
  • Develop and execute DFT verification plans, test scenarios, and coverage models
  • Build SystemVerilog/UVMbased testbenches for DFT feature verification
  • Verify scan insertion, test modes, clock/reset handling, and test access mechanisms
  • Validate MBIST/LBIST controllers, memory repair, and redundancy features
  • Work closely with DFT implementation and ATPG teams to debug test failures
  • Perform gatelevel simulations (GLS) for DFT and test modes
  • Analyze functional/DFT coverage and ensure signoff quality
  • Support postsilicon debug and correlation with presilicon results
  • Contribute to methodology improvements and best practices for DFTDV

ACADEMIC CREDENTIALS:

  • BS/MS EE, CE, or CS
  • 8+ years of design verification experience
  • OOP coding experience (System Verilog, SpecmanE or C++) and SV Assertions

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Benefits offered are described: .

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's Responsible AI Policy is available

This posting is for an existing vacancy.

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About Company

Xilinx, Inc. was an American technology and semiconductor company that primarily supplied programmable logic devices. The company was known for inventing the first commercially viable field-programmable gate array and creating the first fabless manufacturing model.

Job ID: 143793333

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