Job Description

Job Title: Design Verification Engineer ( Bengaluru / Kochi / Chennai / Pune )

Location: Pune / Chennai (with options including Bangalore & Kochi)

Notice Period: Immediate to 30 days (Must be able to join by October end)

Interview Date: October 10th (Virtual)

interview- 3 rounds (Technical + HR) Virtual mode

Required Experience: 5 to 15 Years

Salary: DOE

About the Role

We are looking for a skilled Design Verification Engineer with hands-on experience in live projects. If you have a passion for developing functional verification environments, excellent debugging skills, and a collaborative mindset, we invite you to join our dynamic and growing team.

Key Responsibilities

Environment Development: Design and implement comprehensive functional verification environments, including monitors, checkers, scoreboards, and assertions.
Protocol Expertise: Utilize expertise in AMBA bus protocols, ARM CPU, and optionally PCI Express and/or Ethernet bus protocols to ensure robust verification processes.
Cross-Functional Collaboration: Work closely with cross-functional teams to integrate and troubleshoot verification components within the overall system.
Automation: Employ scripting languages (PERL, Python, Shell, Makefile) to drive automation and efficiency in verification workflows.
Debugging & Insights: Actively participate in debugging sessions, share valuable insights, and maintain effective communication across the team.

Requirements & Skills

Core Skills: Strong SystemVerilog and UVM knowledge with practical, hands-on experience on live projects.
Domain Knowledge: Expertise in AMBA bus protocols, ARM CPU, along with desirable experience in PCI Express and/or Ethernet bus protocols.
Tool Proficiency: Proficient in Unix, Configuration Management, Bug tracking, and verification dashboarding tools.
Methodologies: Experience in developing functional verification environments using random stimulus and functional coverage.

Preferred Qualifications