Design Verification (DV) Engineer-PCIe

We have ahigh-priority urgent requirementfor the below position withmultiple direct clients. Please share suitable profiles at the earliest.

Role:Design Verification (DV) Engineer-PCIe

Experience:5+ to 10+ years

Mandatory Skills:PCIe,System Verilog(SV), UVM

Interview Mode:Face-to-Face

Location:Bangalore

Job Description:

• Strong hands-on experience inDesign Verification-PCIeusingSystemVerilog and UVM methodology
• Must havestrong expertise in PCIe protocoland experience instorage-related projects