Design Verification (DV) Engineer

GTC Informatics Private Limited is hiring experienced Design Verification Engineers for ASIC and SoC verification projects across India. These positions are open on both a full-time and contract basis, depending on client and project requirements. Experienced candidates who can join quickly are encouraged to apply.

Location : PAN INDIA

Roles & Responsibilities:

• Build verification plans and testbenches using SystemVerilog and UVM
• Write test cases, sequences, checkers, scoreboards and coverage models
• Run regressions, debug failures and work with RTL design teams to fix issues
• Drive functional and code coverage closure
• Verify IP, subsystem and SoC-level designs
• Work closely with design and architecture teams on client projects

Required Skills & Experience:

• 4–10 years of experience in ASIC/SoC design verification
• Strong hands-on skills in SystemVerilog and UVM
• Experience writing assertions (SVA) and coverage
• Experience with protocols such as PCIe, AXI, AHB, APB, DDR, USB or Ethernet
• Hands-on with simulators such as VCS, Questa or Xcelium
• Good debugging and communication skills

Good to Have:

• PCIe protocol verification experience
• Exposure to formal verification
• Scripting skills in Python, Perl or Shell

How to Apply:

Apply through Foundit, or send your updated resume to [HIDDEN TEXT]

Email subject: Design Verification Engineer | Total Experience | Current Location

(Example: Design Verification Engineer | 6 Years | Bengaluru)

Include your technical expertise, relevant project experience, current location, notice period and contact details.