C
Design Engineer II
C
Design Engineer II
Cadence Design Systems (India) Pvt LtdEarly Applicant
- Posted a day ago
- Be among the first 10 applicants
Job Description
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
BE/BTECH/ME/MTECH
Job Description
2-5 yrs of work experiences in VLSI domain with Master's/bachelor's degree in engineering Strong expertise in Verilog, HVL(SV, Specman e) with UVM/OVM/eRM methodology Expertise in assertions development/closure, constraint randomization, functional and code coverages, formal verification Expertise in test-bench development Strong RTL and GLS (w/ or w/o SDF) sim debug skills Should be able to manage project schedule and delivery independently
Should be good in Perl/Tcl scripting and automation
We're doing work that matters. Help us solve what others can't.
More Info
Key Skills
SV
SDF sim debug
test-bench development
functional and code coverages
closure constraint randomization
assertions development
eRM methodology
About Company
Skills:
Ovm, Tcl Scripting, Perl, Verilog, SDF, automation, Specman, SV, assertions development, sim debug, functional and code coverages, RTL, Uvm, GLS, eRM methodology, formal verification, test-bench development, closure constraint randomization, HVL
Skills:
redhawk , Shell, Tcl, Verilog, PERL, Innovus, floorplan exploration and optimization, Starrcxt, place and route methodologies, physical implementation and analysis tools, Fusion Compiler, power integrity and reliability analysis, Calibre, VHDL, low power physical design flows and methodologies, timing and signal integrity analysis, metal-only ECO implementation, power grid planning and implementation, timing optimization and timing closure, placement and optimization, Clock Tree Synthesis