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ASIC RTL Design Engineer - Lead Engineer

10-15 Years
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Job Description

  • Lead the architecture and RTL design of complex digital blocks and subsystems for ASICs or SoCs
  • Develop RTL using Verilog/SystemVerilog to meet functional and performance specifications
  • Review micro-architecture and provide design solutions optimized for power, performance, and area
  • Work closely with the verification team to ensure thorough test coverage and efficient debugging
  • Collaborate with synthesis, STA, and physical design teams for design closure

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Indian

About Company

Job ID: 120341479

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