- Developing and verifying digital designs for next-generation NRZ and PAM-based SerDes products.
- Running lint/cdc/rdc checks and synthesis flow.
- Working with Verilog and VCS to ensure design accuracy.
- Defining synthesis design constraints and resolving STA issues.
- Collaborating with mixed-signal engineers to deliver high-end mixed-signal designs from specification development to functional and performance tests.
- Interacting with Application Engineers for customer support and resolving technical issues with Analog and P&R teams.
The Impact You Will Have:
- Contributing to the development of cutting-edge SerDes products that lead the industry.
- Enhancing the performance, power, and size efficiency of our silicon IP offerings.
- Enabling rapid market entry for differentiated products with reduced risk.
- Driving innovation in high-speed digital design and data recovery circuits.
- Supporting the creation of high-performance silicon chips and software content.
- Collaborating with a world-class team to solve complex design challenges.
What You'll Need:
- BSEE or MSEE with a minimum of 2 years of experience in digital design and front-end flows.
- Proficiency in running lint/cdc/rdc checks and synthesis flow.
- Experience with Verilog and VCS.
- Knowledge of digital design methodologies, DFT insertion, synthesis constraints, and flows.
- Scripting experience in Shell, Perl, Python, and TCL (preferred).
