ASIC Design For Testability CAD Engineer, Silicon

Role Responsibilities:

• Collaborate with DFT, RTL, and Physical Design engineers to integrate and verify DFT structures.
• Design and implement subsystem level DFT SCAN and MBIST architectures across multiple power domains.
• Develop and maintain scripts to automate DFT flows and improve design efficiency.
• Create and validate test patterns for production testing on ATE systems.

Job Requirements:

• Bachelor's degree in Computer Science, Electronics, Electrical Engineering, or equivalent practical experience.
• 5 years of hands-on experience in ASIC DFT design and pattern bring-up on ATE and manufacturing environments.
• Strong expertise with ATPG, Low Power designs, BIST, JTAG, IJTAG, and DFT EDA tools like Tessent.
• Proficiency in scripting languages such as Python and Tcl to automate workflows.