Location: Hyderabad
Notice Period: Immediate to 30 Days
Job Description
We are looking for a skilled Analog Layout Engineer with 5–8 years of experience to join our team in Hyderabad. The ideal candidate should have strong expertise in analog and mixed-signal layout design, with a deep understanding of semiconductor processes and layout techniques.
Key Responsibilities:
- Design and develop high-quality analog and mixed-signal layouts.
- Work closely with circuit design engineers to implement layout requirements.
- Perform layout verification including DRC, LVS, and ERC checks.
- Ensure layout meets performance, area, and power specifications.
- Handle parasitic extraction and post-layout simulations.
- Follow best practices for matching, shielding, and noise reduction.
- Collaborate with cross-functional teams to meet project timelines.
Required Skills:
- Strong experience in analog layout design.
- Hands-on experience with layout tools (Cadence Virtuoso or similar).
- Good understanding of CMOS technology and semiconductor fundamentals.
- Knowledge of DRC, LVS, ERC, and parasitic extraction.
- Experience with high-speed, low-noise, and precision analog layouts.
- Strong problem-solving and debugging skills.
Preferred Qualifications:
- Experience working on advanced nodes is a plus.
- Exposure to mixed-signal or RF layouts is an added advantage.
