Custom layouts for High-Speed Custom Analog/Digital blocks, such as Ring Oscillators, Dividers, Bias Blocks (Voltage & Current references), pre-drivers etc. in TSMC 3nm and below.
Independent in debugging and resolving the layout fixes in various verification flows.
Flexible to take different tasks in project.
Have accountability and ownership on blocks & bigger macros assigned.
Responsible for running release flows and take to closure on time, adhering the milestones, raise concerns well in advance for any foreseen issues.
Communicate with the team on block level specs, to better integrate the top modules.
Qualifications:
B.Tech/B.E./MS/M.E./M tech in Electrical Engineering.
Required Skills
10+ yrs of hands-on experience in independence block/module layouts with Cadence Layout design tools.
Experience in TSMC 5nm or lower node is must.
Well versed with layout design and verification tools - Cadence Virtuoso EXL/GXL, Calibre etc.
Preferred Skills
Experience in leading module/macro level layout, communicating with various team members to better co-ordinate layout integrations.
Knowledge of scripting (SHELL, PERL, SKILL), excel is good to have.
