JD – AMS & Analog Layout Engineer
As an AMS Design & Analog Layout Engineer at HCL Tech, you will play a pivotal role in designing, developing, and validating advanced analog and mixed-signal (AMS) integrated circuits. Your contributions will directly impact the development of high-performance semiconductor solutions, supporting HCL Tech's mission to deliver best-in-class products to global clients in various high-tech industries.
Detailed Responsibilities:
- Design, simulate, and validate analog and mixed-signal (AMS) circuits for semiconductor products.
- Develop and optimize analog layouts in compliance with design specifications and industry standards.
- Collaborate closely with digital/analog design teams to ensure seamless integration and verification of AMS blocks.
- Perform layout versus schematic (LVS) and design rule checks (DRC) to guarantee layout integrity.
- Participate in silicon validation, debugging, and testing of AMS circuits post-fabrication.
- Prepare detailed technical documentation and contribute to design reviews.
- Drive continuous improvements in design methodologies, tools, and processes.
Skill Requirements:
- Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, or a related field.
- Proven experience in analog and mixed-signal (AMS) design and analog layout.
- Proficiency with industry-standard EDA tools (e.g., Cadence Virtuoso, Mentor Graphics, Synopsys).
- Strong understanding of semiconductor device physics, analog circuit theory, and layout best practices.
- Experience with LVS, DRC, and post-layout simulation.
- Excellent analytical, problem-solving, and communication skills.
Other Requirements (Nice to have):
- Experience in low-power or high-speed analog circuit design is a plus.
- Familiarity with advanced process nodes (e.g., 28nm, 16nm, or smaller) is advantageous.
- Prior exposure to automotive, IoT, or consumer electronics applications is desirable.
- Ability to work in a global, cross-functional team environment.
