AMS Verification Engineer
Experience- 4+ years
We are looking for a highly motivated AMS (Analog Mixed-Signal) Verification Engineer to join our growing design verification team.
Key Responsibilities
- Develop and implement AMS verification environments using UVM or similar methodologies.
- Create behavioral models of analog blocks using Verilog-A/AMS or SystemVerilog.
- Perform co-simulation between analog and digital domains using tools like Cadence Virtuoso AMS Designer, Synopsys CustomSim, or Mentor Questa ADMS.
- Define and execute test plans, write testbenches, and perform coverage analysis to ensure verification completeness.
- Collaborate with analog design, digital verification, and system architecture teams to debug and resolve mixed-signal issues.
- Contribute to developing automation scripts and verification flows for improved efficiency.
- Participate in design and verification reviews to ensure best practices and process adherence.
Reach out on [Confidential Information]
