AMS SPICE Verification Engineer

Position: AMS SPICE Verification Engineer (BB50FT RM 4387)

Role Overview

We are seeking an AMS SPICE Verification Engineer with 5+ years of experience in analog/mixed-signal simulation and verification at block, subsystem, and chip-top levels.

Key Responsibilities

• Develop verification plans and AMS SPICE testbenches.
• Perform transistor-level and mixed-signal simulations.
• Verify complex SoC integrations involving power management, PLLs, ADCs, DACs, bandgap references, oscillators, clocking circuits, SerDes, and digital control systems.
• Develop robust, self-checking AMS SPICE testcases.
• Debug convergence issues at analog-digital boundaries.
• Resolve simulation setup, loading, stability, and environment-related issues.
• Optimize simulation runtime and capacity.
• Analyze waveforms and debug AMS behavior using Cadence Virtuoso, SimVision, and Verisium.
• Collaborate with system architects, analog designers, digital designers, and verification teams.
  
  

Required Qualifications

• B.Tech/M.Tech in Electronics, Electrical, VLSI, or a related field.
• 5+ years of relevant AMS SPICE simulation experience.
• Experience at block, subsystem, and chip-top levels.
• Strong understanding of analog design fundamentals and mixed-signal architectures.
• Experience with verification planning, testbench development, simulation debug, and testcase creation.
• Strong analytical, problem-solving, and communication skills.
  
  

Required Tools

• Cadence Virtuoso.
• SimVision and/or Verisium.
• Spectre, UltraSim, APS, and/or XPS.
• Cadence Xcelium and/or DMSO.
  
  

Preferred Experience

• Debugging AMS convergence and analog-digital integration issues.
• Simulation runtime optimization.
• Experience with loading, stability, setup, and environment problems.
• Exposure to complex semiconductor products and SoC-level AMS verification.
• Ability to learn new technologies quickly.
• Self-motivated, proactive, and enthusiastic team player.