C, C++, coverage closure, GLS power aware verification, low power design verification techniques, coverage planning, ACPI standards, power management verification, post-si verification, testbench development, systemverilog

assembly language (ASM), C, Python, micro-architecture concepts, CPU architecture, Hardware Design Verification, EDA Tools

C, C++, Assembly Language, Perl, Verilog, Ovm, Python, Tcl, Uvm, Emulation, Power aware verification, systemverilog

C, Simulation, CPU verification, Uvm, RTL, Emulation, Digital Design

Test Planning, C, Python, Computer Architecture, systemverilog, coverage analysis, CPU microarchitecture, stimulus generation, coverage closure, Debug, verification flow methodology

C, C++, Arm, functional coverage, Verification Tools, verification methodologies, RISCV, DSP core, Uvm