static timing analysis, RISC CPU IP, CPU microarchitecture, IP integration, Floor Planning, silicon bring-up, Timing Analysis, Emulation, Physical Design, chip validation, Rtl Design, CDC analysis, ARM CPUs, SoC design methodology, characterisation, Synthesis, linting, Timing Closure, Verification, equivalence checking, BUS Protocols

I2c, Python, DFA, Buck and Boost PMIC, Dfm, PCB back-end process, ONFI interface, Logic Analyzers, DC-DC converters, PCIe analyzers, NAND memories, I3C, Power Analyzers, SMBus, Oscilloscopes, LDO Load Switch devices, LPDDR4 5, PCIe interface Gen5 Gen6

os virtualization , Usb, Server design, Bash, Ethernet, Perl, Spi, shell scripting, I2c, Python, Pcie, DDR, x86 architecture, DC Power circuit design, High-speed PCB design, Signal Integrity, hardware bring-up, EDA schematic design tools, Hardware Design, Validation, High-speed board design, PCB schematic creation, Windows Power Shell, physical Layout design, FPGA code development and validation, PCIe bus design simulation and validation