C, Fpga, C++, Ipmi, Gdb, Uart, Spi, Gpio, Linux, Pcie, Bmc, I2c, Python, Redfish, sonic, KGDB, ONIE

Pcie, High-Speed SERDES technologies 112G, Signal Integrity, high performance high bandwidth routers, EMI EMC Safety consideration and compliance tests, hardware system designs for switches, product development life cycle of complex hardware systems, digital analog circuit-based hardware designs, Mechanical Thermal consideration, Multi-core Network processor based designs, PCB Layout design, Memory Technologies

Spi, Pcie, I2c, Design validation, Ethernet high speed SERDES 25G interfaces, SERDES technology, X86 architecture, Cadence Concept, Hardware bring-up, SSD memory devices, MDIO, Signal Integrity, Cadence Allegro

Spi, Pcie, I2c, Ethernet high speed SERDES 25G interfaces, X86 architecture, Cadence Concept, SSD memory devices, MDIO, Cadence Allegro, Hardware bring-up, Design validation, SERDES technology, Signal Integrity

hardware bring up , Spi, Pcie, I2c, Ethernet high speed SERDES 25G interfaces, design validation, X86 architecture, Cadence Concept, SSD memory devices, MDIO, DDR5, Cadence Allegro

Usb, Tcl, Verilog, Python, Pcie, DDR, Rtl Design, Uvm, systemverilog, AHB, formal verification, APB, Axi