Java, C++, test optimization techniques, yield analysis, Debug, Advantest V93K SMT8 ATE platforms, Statistical Tools, load board design

analog layout techniques, circuit architectures, power management ICs, ESD latch-up, analog circuit design fundamentals, simulation methodologies, transistor-level analog IC design, analog IP development, chip-level reliability considerations

SPICE-based simulators, Mixed-signal chip environments, Hspice, HBM, ESD circuit design, High-speed I/O, Cdm, Spectre

statistical process control (SPC), C, LabVIEW, Databases, C++, Version Control, JIRA, Bitbucket, Python, MES systems, yield analysis, manufacturing yield analysis, defect reduction, data analytics tools, Root Cause Analysis, Project Management Tools, embedded systems testing, Hardware Design, fixture development, yield improvement

Python, Perl, Tcl, ASIC Implementation, EM IR PDN Physical design, Static Dynamic Power Distribution analysis, Electro-migration, ESD Analysis, make, STA on advanced process nodes

Ipc, Msd, PCBA standards, Quality Management System auditing, Powerpoint, Esd, SQC Tools

assembly variation, worst-case RSS, gd&t, CETOL 6?, statistical Monte Carlo, Process Capability, dimensional measurement, sensitivity methods, datum structures, ASME Y14.5, 3D tolerance analysis, 3DCS