Static Timing Analysis (STA), PERL, Python, Tcl, Synthesis, Cadence

Synopsys Design Constraints (SDC), Static Timing Analysis (STA), primetime, Fusion Compiler, ICC2, Mentor Graphics

Clp, automation, Scripting, LINT, prelayout STA, low power aspects, postlayout STA, Synthesis, cdc, SDC generation, demotion, SDC development, LEC, RTL Netlist based static checks, Dft, Timing Constraints, Timing Closure, Verification, promotion, equivalence checking

QRC, primetime, Tempus, STA and signoff tools

Sta, Synopsys, Synopsis Primetime, RTL2GDS, physical design EDA tools, Cadence

IO STA deriving constraints, group and path based analysis, constraints development, Timing Closure, functional and test mode constraints merging, crosstalk analysis, ILM timing models, margins OCV timing corners