C, C++, coverage closure, GLS power aware verification, low power design verification techniques, coverage planning, ACPI standards, power management verification, post-si verification, testbench development, systemverilog

C, C++, Makefile, Windows, Shell, Linux, Perl, Verilog, Ruby, Systemc, HLS tools, Graphics pipeline knowledge, UVM testbenches, Simulation Tools, systemverilog, TLM, Developing UVM based verification frameworks

Arm, C, RISCV, Uvm, SV, Verification Tools, DSP core

C, Verilog, automation, Scripting, coverage closure, RTL testbench debugging, Uvm, systemverilog