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Showing 2 jobs
Skills:
Shell scripting, DFT verification, Scan Insertion, Synopsys Tetramax DFTMAX, IEEE1500, memory BIST, Gate-level simulation, VCS simulation tool, JTAG 1149.x, Verilog RTL design, Scan, ATPG pattern generation, Mentor testkompress
Skills:
Perl, Shell scripting, DFT verification, Synopsys Tetramax DFTMAX, VCS simulation tool, IEEE1500, Scan memory BIST, JTAG 1149.x, Verilog RTL design, Design for Test methodologies, Mentor testkompress
