Java, C, C++, MATLAB, Visual Basic, Perl, Python, Teradyne UltraFLEX, Spc, Oscilloscopes, Dft, Advantest V93K, ATPG, Logic analyzers, PMU, signal generators, ATE test development, Doe, RF Testing, SMUs

static timing analysis, Perl, Verilog, Python, Tcl, Rtl Design, Synthesis, Dft, ATPG, systemverilog

Synthesis, multi-voltage design, floorplanning, SDC constraint development, MBIST, test specifications, Dfm, formal verification, Timing Closure, DRC, debug test coverage, Scan, ESD checks

Dft, Tessent Modus MBIST, Scan Compression, SCAN pattern simulations, MBIST, Tessent Modus diagnosis tool, Scan Stitching, Tessent Modus ATPG, JTAG Techniques