Soc Architecture, Physical design interaction, SoC integration, Formal verification techniques and tools, Verilog RTL development, UPF and low-power methodologies

simulations , DDR, Pcie, Verilog, Ethernet, System Verilog, Micro-architecture development, Block level design, UCIe, Optimization, Rtl Design, VHDL, High speed peripherals, Digital Design, Control Loops, Micro-controller integration, Chiplet interconnect, Specification creation

Uart, Spi, Verilog, I2c, LINT, cdc, MAS development, Sub-system design, SoC integration, ip design, Quality check flows, AMBA bus protocols, Axi, APB, RTL Coding, Medium complexity protocol, AHB, Microarchitecture