Python Scripting, Post-silicon debug, No-delay simulation, With-delay simulation, MBIST repair schemes, Memory test algorithms, VecGen pattern generation, Synopsys VCS, SoC DFT integration, Synopsys MBIST SMS5, MBIST insertion, Top-level MBIST verification, MBIST diagnostics, Silicon bring-up

Sed, Jtag, Awk, Tcl, debug skills, MBIST, gate-level simulation, Spyglass-DFT, test cost reduction analysis, Dft, ATPG, scan-stitching, Scan, scripting skills, LBIST, Tessent flow, post silicon support

Tcl, Jtag, Perl, Cadence Tools, BSCAN, Dft, Compression Testing

scan patterns generation, SSN OCC TAP verification, multi die DFT, Post silicon debug, ICL simulations, ATPG, scan-stitching, Tessent ATPG, timing and no-timing simulations, Pattern retargeting

Jtag, DFT Engineer, DFT Manager, iJTAG, BSCAN, ATPG, technical ownership, DFT tools