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Showing 7 jobs
Skills:
Verilog, Python, Perl, systemverilog, Uvm
Skills:
Verilog, Sata, Python, Perl, Usb, Uvm, constrained random verification, functional coverage, PCI Express, VMM, systemverilog, DV methodologies
Skills:
Vcs, Pcie, Python, Tcl, Xcelium, Uvm, systemverilog, APB, Questa, SVA assertions, AHB, AXI4
Skills:
Perl, Shell scripting, Python, vManager, Xcelium, Cadence environments, JasperGold, UVM methodologies
Skills:
Arm, Python, RTL simulation, Debug, functional coverage closure, RISC-V, regression automation, x86 architecture, Uvm, SVA, systemverilog
Skills:
code coverage , C, Shell, Perl, Verilog, Debugging, Python, System Verilog, Tcl, UVM methodology, Metric Driven Verification, formal verification methodologies, assertions, constrained random methodologies, functional coverage
Skills:
Vcs, Pcie, Python, Tcl, Xcelium, Uvm, systemverilog, APB, Questa, AXI4, AHB, SVA
