Unix, Bug Tracking, Makefile, Configuration Management, Shell, PERL, Python, Random stimulus, System Verilog UVM, ARM CPU, Checkers, PCI Express, Assertions, AMBA bus protocols, Ethernet bus protocols, Functional verification environments, Scoreboards, Monitors

Perl, Python, System Verilog, NVIDIA custom compilers and tools, formal verification, Coverage metrics, Profiling Tools, SV constraint random verification, Uvm, X prop

C, Opengl, Opencl, D3D, Uvm, systemverilog

Usb, Perl, Verilog, Sata, Python, Testbench development using SystemVerilog, DV methodologies, PCI Express, Uvm, verification tools for simulation and debug, systemverilog, functional coverage based constrained random verification, VMM

protocol stack , Java, Gerrit, Bash, Jenkins, Git, Python, Lte, Qos, 5G New Radio NR, RAN architecture, ip networking, resource load, 5G NR air-interface technologies, Linux environments, CI CD concepts, latency, Troubleshooting, QoE, throughput, performance verification

C, Verilog, automation, Scripting, coverage closure, RTL testbench debugging, Uvm, systemverilog