Firmware, Computer Engineering, Cross Functional Team Building, RTL Synthesis, foundation design, Diagnostics, Working alongside Product Teams, Analog Design, Electrical Engineering, RTL Coding, Simulation, synthesis design, Fault Reporting

rtl verification , Verilog, systemverilog, FSM design, Rtl Design, Axi, reset strategy, debugging methodologies, APB, BUS Protocols, SoC design flow, Simulation, timing considerations, AHB, datapath design, clock-domain handling