Job Details

Job Description:

Join our highperformance Silicon Validation team and play a critical role in enabling robust FPGA security for nextgeneration FPGA and SoC devices. You will lead devicelevel and IPlevel validation of FPGA, secure boot and rootoftrust features to ensure industryleading security, reliability, and system integrity.

This role offers handson exposure to secure FPGA architectures, SoC bringup and systemlevel debug, while collaborating closely with architecture, design, firmware, and platform teams to influence future secure FPGA products.

Key Responsibilities

Develop comprehensive validation strategies for FPGA, security, aligned with device architecture, security requirements, and business objectives.
Perform security feature validation, including secure boot, authentication, encryption, key management, rootoftrust, and protection against misconfiguration or unauthorized access.
Create and execute test cases and vectors for configuration robustness, security corner cases, fault injection, and negative testing scenarios.
Perform device and system bringup, debugging, security violations, boot hangs, issues across silicon revisions.
Work with evaluation boards, reference platforms, and customerlike systems to ensure interoperability and realworld usage coverage.
Drive innovation in validation methodologies, automation, and infrastructure, improving test coverage, scalability, and efficiency for future FPGA and SoC generations.
Collaborate with hardware, firmware, and board design teams on securityready evaluation platforms, influencing observability and debug capability.

Qualifications

Bachelor's or Master's degree in Electrical & Electronics Engineering, Computer Engineering, or related field.
8+ years of handson silicon validation experience, with strong focus on FPGA configuration, security, SoC, or embedded processor subsystems.
Strong knowledge of hardware security concepts, such as secure boot, authentication, encryption, key storage, lifecycle states, and threat modeling.
Handson experience with systemlevel validation and debug, including poweron bringup, failure analysis, and silicon issue triage.
Familiarity with FPGA and SoC architectures (strong advantage).
Experience or familiarity with Python for automation, scripting, and test infrastructure; Verilog familiarity is a plus.

Job Type

Regular

Shift

Shift 1 (India)

Primary Location:

Bengaluru, Karnataka, India

Additional Locations:

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

FPGA Post Silicon Validation Engineer - Security