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Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Key Responsibilities

Develop and standardize EMIR methodology that applies consistently across all DRAM products, ensuring alignment, repeatability, and high-quality analysis outcomes
Perform static and dynamic EM/IR analysis using RedHawk or Totem or other industrystandard tools; identify rootcause issues such as highresistance segments, insufficient via density, and decap deficiencies, and provide clear, actionable recommendations to design and layout teams.
Actively leverage AIbased tools, agentic workflows, and automation frameworks for effective Power-delivery-network (PDN) analysis.
Maintain a strong understanding of the full EMIR flow—from netlist preparation, extraction, simulation, and debug to reporting and silicon correlation—and ensure accurate evaluation across operating modes and temperatures.
Partner across design, timing, physical implementation, architecture, modeling, and verification teams to understand real switching behavior, develop worstcase vectors, and standardize analysis expectations across global teams.
Collaborate with cross-geographical teams and also EDA tool vendors to evaluate and improve EMIR methodologies, and document Best Known Methods (BKMs) to enhance consistency and correlation across DRAM teams.
Develop and maintain dashboards to track EMIR results, monitor trends, and support signoff progression for multiple designs.

Qualifications

Master's degree in electrical or computer engineering.
4 - 8 years of experience in PDN / Power Integrity / EMIR analysis for advanced semiconductor or SoC designs.
Deep handson experience with Ansys RedHawk or Totem for fullchip EM/IR verification and PDN analysis, including setup, scenario creation, debug, and rootcause analysis.
Expertise in vectorless and dynamic/patternbased IRdrop analysis, with strong ability to interpret current behavior, switching activity, and voltagesensitivity trends.
Proven ability to identify root causes of IRdrop issues—including switching activity, grid resistance, parasitics, routing topology—and translate analysis results into actionable design or layout fixes.
Experience performing SoClevel or chiplevel EMIR signoff and supporting tapeouts.
Solid understanding of PDN interactions with circuit timing/margin, layout topology, and chiplevel power architecture.
Ability to understand the full endtoend design flow, including RTL, floorplanning, routing, extraction, EMIR, STA, and silicon correlation.
Familiarity with Make or similar automation frameworks for EMIR rollups.
Handson experience with lowpower, multivoltage, poweroff, or mixedsignal designs.
Experience in chiplevel IR/EM analysis and driving closure across multifunctional teams.

Preferred Qualifications

Experience with powermodeling or currentsource modeling flows (e.g., CPM).
Scripting skills in Python/Tcl for automation and data analysis.
Experience in improving EMIR/PI analysis flows or methodology.
Knowledge of PnR or STA tools (FusionCompiler, PrimeTime).
Background in circuit design with SPICE experience.
Exposure to or strong interest in AI/ML-assisted design flows, agentic AI or advanced automation in circuit design and verification.
Familiarity with memoryproduct power behavior (DRAM/SRAM/NAND).

About Micron Technology, Inc.

We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all. With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience.

To learn more, please visit micron.com/careers

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Design Methodology Senior / Staff DRAM Power Integrity Engineer