Cadence Virtuoso, Mixed-Signal IC Design, High-Speed ADC Design, Analog IC Design

Cadence Virtuoso, analog and mixed-signal circuit design, high-speed analog architectures, Signal Integrity, jitter, Spectre, advanced CMOS technology nodes

UNIX, Layout tradeoffs, End to end design flow, CMOS BiCMOS fabrication processes, Modeling Tools, MOS transistors, Analog Circuit Design, Poles zeros compensation, Signals systems and transforms, Mixed Signal Design, Production test applications, Feedback systems, device physics, Circuit simulation tools, AC DC analysis, Loop dynamics, Analog Power IC design, Layout verification tools

temperature sensors , bandgap references , AC simulations, Spectre AMS, mixed-signal circuit design, DNL, ADEXL, op-amps, biasing circuits, INL, Cadence Virtuoso suite, low-noise Sigma-Delta converters, Layout XL, THD, precision analog circuits, CMOS technologies, DC operating point, noise, Schematic Maestro, Stability, frequency response, LDOs, mismatch analysis

bandgap references , Design extraction and simulation flows, Analog layouts, Source-Sink LDOs, High speed level shifters, Current Sense SAR ADCs, Analog Circuit Design, Silicon debugs, Analog feedback loops, Temperature Sensor, Switch Cap circuits, Ultra-low power Oscillators, Control Loops, Comparators, Op-Amps, Analog Buffers, Simulation and Verification, Thermal Under-Voltage Over-Voltage Over Current, IC development flow, Charge Pumps, Control loop architectures, LDOs

Low-Noise Amplifier (LNA) design, Debugging, Cadence Tools, Monte Carlo analysis, floorplanning, Noise optimization techniques, Flicker noise reduction, Spectre, Thermal noise budget management, Calibre, Shield strategy, High-precision test equipment, SAR ADCs, Analog layout matching, characterization, Ultra-low-power analog circuit design, virtuoso, Column-parallel ADC architectures, Deep sub-micron CMOS process nodes, Parasitic Extraction, Silicon bring-up