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Showing 3 jobs
Skills:
System Verilog, Cadence Xcelium, HBM4, DRAM Memory Controller IPs, Cadence, verification management tools, Questa Formal Mentor, assertion-based verification, Uvm, Synopsys VCS, Crypto, Synopsys JasperGold, DDR5, VC Formal, LPDDR6, Network-on-Chip NoC
Skills:
System Verilog, Finesim, HSIM, Test Bench development, XA hspice, Uvm
Skills:
Vcs, Makefile, Shell, Perl, Python, System Verilog, Assertion-based verification, Xcelium, UVM methodology, Constrained-random verification, Questa, Vivado Simulator, formal verification
