boundary scan , Jtag, Scripting, Tcl, multi-clock domain designs, DFT signoff, scan architecture, MBIST, DFT architecture, Timing Constraints, ATPG, clocking architectures, silicon bring-up, manufacturing test flows, LBIST, compression methodologies

Test Planning, Vcs, Jtag, Shell, Perl, Python, Tcl, GLS Signoff, Fusion Compiler, Xcelium, Silicon Bring-up, MBIST, Scan Insertion, Tessent, ATPG, Conformal Formality, DFT RTL Design Integration, Genus, Diagnosis, Debug, LBIST, IJTAG, DFT Architecture