Search Jobs
Search by job, company or skills
Search by job, company or skills
Showing 3 jobs
Skills:
boundary scan , Vcs, Tcl, System Verilog, Python, Perl, Tessent tool sets, TestMax, Logic Equivalency checking, EDA Tools, ATPG, Scan and BIST architectures, primetime, Gate level simulation debugging, Jtag protocols, memory BIST, TetraMax
Skills:
Vcs, Scan Insertion, ATE patterns, JTAG protocols, Tessent, Gate level simulation, ATPG, Post-silicon validation, P1687, TestMax, TetraMax
Skills:
Vcs, Scan Insertion, Gate level simulation debugging, ATE patterns, TestMax, Post-silicon validation, JTAG protocols, ATPG, P1687, Tessent tool sets, TetraMax
