monte carlo , Perl, Python, Tcl, Statistical Analysis, SPICE simulations, PVT corners, transistor-level simulation, yield optimization, Cadence Virtuoso, SRAM Memory circuit design, CMOS fundamentals, Circuit Analysis, Stability, device physics, memory timing, leakage power

Python Scripting, silicon debug, Circuit Simulation, nWave waveform viewer, Memory Compilers, XA FinSim, Silicon Failures Analysis, CMOS Circuit Design, XARA, HSIM, Hspice, Power gating Architecture

rtl development , Vcs, Gdb, Shell, Verilog, Python, Perl, bring-up lab debug, ASIC design flow, Debussy, Timing Analysis, Simulation Tools, design and verification tools, Logic Synthesis, micro-architecture, floor-planning, scripting knowledge, debug tools, Eco