Cpu, Gpu, physical design engineering, ASIC RTL2GDS implementation, high performance design schema, power optimization techniques, Electrical Engineering, Computer Science

ML optimization tools (DSO.ai), CTS and routing, Timing-driven placement, PPA Optimization, floorplanning, Hierarchical physical design, RTL-to-GDS implementation flow, Synopsys Fusion Compiler, Pin assignment, Timing budgeting