Spi, Pcie, I2c, Design validation, SERDES technology, X86 architecture, Cadence Concept, high speed design, Hardware bring-up, SSD memory devices, MDIO, Signal Integrity, Cadence Allegro

Schematic layout tools knowledge, analog and digital design skills, component selection for obsolescence issues, Design FMEA creation and revisions, test plans and test reports

thermal management , Usb, Spi, Can, Ethernet, I2c, electrical systems integration, CAD Tools, MIPI, Robotics, LVDS, Embedded Hardware, r&d, electromechanical system design, outdoor electronics, IP ratings, EMI compliance, Hardware Design, ruggedization, ST ARM

Data Structures, Algorithms, PERL, Python, Tcl, Skill, VLSI concepts, Cadence, software optimization, EDA Tools, Custom Layout, Synopsys

hardware bring up , Spi, Pcie, I2c, design tools including Cadence Concept, Ethernet high speed SERDES 25G interfaces, design validation, X86 architecture, SSD memory devices, MDIO, DDR5, Cadence Allegro

hardware bring up , Spi, Pcie, I2c, Ethernet high speed SERDES 25G interfaces, design validation, X86 architecture, Cadence Concept, SSD memory devices, MDIO, DDR5, Cadence Allegro

Functional Testing, Source code design, Certification according to RTCA DO-254, Qualification testing according to DO-160, Requirement generation, FPGA development life cycle, Test bench based verification, Board bring up testing, Schematic generation, Detailed design, Electronic product development, Schematic generation tools

Usb, C, Spi, Pcie, I2c, Python, Reliability Testing, logic analyzers, protocol analyzers, Oscilloscopes, post-silicon validation, JTAG debuggers, Functional Verification, hardware bring-up, BUS Protocols, performance characterization, Embedded Systems, server systems management, Silicon Characterization, Emulation FPGA platforms, Linux systems, debugging hardware failures, validation plans