Clp, Automation, LINT, cdc, Prelayout STA, SDC generation, AI scripting, LEC, RTL Netlist based static checks, Timing Closure, Synthesis, SDC constraints development, Postlayout STA

Clp, automation, Scripting, postlayout STA, LINT, low power aspects, prelayout STA, Synthesis, cdc, SDC generation, demotion, SDC development, LEC, RTL Netlist based static checks, Dft, Timing Constraints, Timing Closure, Verification, promotion, equivalence checking